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Browsing by Author Chaturvedi, Nitin

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Issue Date	Title	Author(s)
2013	An adaptive coherence protocol with adaptive cache for multi-core architectures	Chaturvedi, Nitin
2015-07	An adaptive migration–replication scheme (AMR) for shared cache in chip multiprocessors	Chaturvedi, Nitin
2010	Adaptive Zone-Aware Multi-bank on Chip last level L2 Cache Partitioning for Chip Multiprocessors	Chaturvedi, Nitin
2019	A CMOS/MTJ Based Novel Non-volatile SRAM Cell with Asynchronous Write Termination for Normally OFF Applications	Chaturvedi, Nitin
2017	A comparative analysis of read/write assist techniques on performance & margin in 6T SRAM cell design	Chaturvedi, Nitin
2017	Design and analysis of 6T SRAM cell with NBL write assist technique using FinFET	Chaturvedi, Nitin
2020	Design of a Low Power 11T-1MTJ Non-Volatile SRAM Cell with Half-Select Free Operation	Chaturvedi, Nitin
2021	Design of a Low Power Approximate Adder based on Magnetic Tunnel Junction for Image Processing Applications	Chaturvedi, Nitin
2019	Design of a Robust Logic Gate using Magnetic Tunnel Junction	Chaturvedi, Nitin
2022-08	Design of a STT-MTJ Based Random-Access Memory With In-situ Processing for Data-Intensive Applications	Chaturvedi, Nitin
2021	Design of an MTJ/CMOS-Based Asynchronous System for Ultra-Low Power Energy Autonomous Applications	Chaturvedi, Nitin
2016	Design of non-volatile asynchronous circuit using CMOS-FDSOI/FinFET technologies	Chaturvedi, Nitin
2014	Development of micronutrients rich homemade extruded food products with theincorporation of processed foxtail millet, wheat and chickpea	Chaturvedi, Nitin
2021	Drone-MAP: A Novel Authentication Scheme for Drone-Assisted 5G Networks	Chamola, Vinay; Alladi, Tejasvi; Chaturvedi, Nitin
2021-04	A Dual-Mode In-Memory Computing Unit Using Spin Hall-Assisted MRAM for Data-Intensive Applications	Chaturvedi, Nitin
2015-05	An efficient adaptive block pinning for multicore architectures	Chaturvedi, Nitin
2015	An Efficient Data Access Policy in shared Last Level Cache	Chaturvedi, Nitin
2020-10	Energy-efficient data retention in D flip-flops using STT-MTJ	Chaturvedi, Nitin
2017	An exploration of neuromorphic systems and related design issues/challenges in dark silicon era	Chaturvedi, Nitin
2019-04	An FPGA Based Hardware Accelerator for Classification of Handwritten Digits	Chaturvedi, Nitin

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