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BITS Pilani Institutional Repository
Browsing by Author Rao, V. Ramgopal
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Showing results 24 to 43 of 371
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Issue Date
Title
Author(s)
2009
Benchmarking the device performance at sub 22 nm node technologies using an SoC framework
Rao, V. Ramgopal
2010
A Binary Tunnel Field Effect Transistor with a Steep Sub-threshold Swing and Increased ON Current
Rao, V. Ramgopal
2009-10
Bio-functionalization of silicon nitride-based piezo-resistive microcantilevers
Rao, V. Ramgopal
2007-08
Border-Trap Characterization in High-κ Strained-Si MOSFETs
Rao, V. Ramgopal
2015
Bottom-up meets top down: An integrated approach for nano-scale devices
Rao, V. Ramgopal
2011-08
Bottom-up method for work function tuning in high-k/metal gate stacks in advanced CMOS technologies
Rao, V. Ramgopal
2009-02
A CAD-compatible closed form approximation for the inversion charge areal density in double-gate MOSFETs
Rao, V. Ramgopal
1999-09
Capacitance Degradation due to Fringing Field in Deep Sub-Micron MOSFETs with High-K Gate Dielectrics
Rao, V. Ramgopal
2015
Carbon black nanocomposite piezoresistive microcantilevers with reduced percolation threshold
Rao, V. Ramgopal
1999
Channel engineering for high speed sub-1.0 V power supply deep sub-micron CMOS
Rao, V. Ramgopal
2009-06
Characterization of interface and oxide traps in Ge pMOSFETs based on DCIV technique
Rao, V. Ramgopal
2001-10
Characterization of lateral asymmetric channel (LAC) thin film SOI MOSFETs
Rao, V. Ramgopal
2021-11
Charge Carrier Doping As Mechanism of Self-Assembled Monolayers Functionalized Electrodes in Organic Field Effect Transistors
Rao, V. Ramgopal
1998-05
Charge injection using gate-induced-drain-leakage current for characterization of plasma edge damage in CMOS devices
Rao, V. Ramgopal
1997-03
Charge trapping behaviour in deposited and grown thin metal-oxide-semiconductor gate dielectrics
Rao, V. Ramgopal
2009
Chemical Vapor Deposition Precursors for High Dielectric Oxides: Zirconium and Hafnium Oxide
Rao, V. Ramgopal
2003-10
CHISEL programming operation of scaled NOR flash EEPROMs-effect of voltage scaling, device scaling and technological parameters
Rao, V. Ramgopal
2012
Circuit Optimization at 22nm Technology Node
Rao, V. Ramgopal
2007
Circuit Performance Improvement Using PDSOI-DTMOS Devices with a Novel Optimal Sizing Scheme Considering Body Parasitics
Rao, V. Ramgopal
2008-06
Closed Form Current and Conductance Model for Symmetric Double-Gate MOSFETs using Field-dependent Mobility and Body Doping
Rao, V. Ramgopal