BITS Pilani Institutional Repository: Browsing DSpace

Browsing by Author Gupta, Anu

Jump to: 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
or enter first few letters:

Showing results 33 to 52 of 72 < previous next >

Issue Date	Title	Author(s)
2013	Implementation of high speed energy efficient 4-bit binary CLA based incrementer /decrementer	Gupta, Anu
2009	Improved Implementation of CRL and SCRL Gates for Ultra Low Power	Gupta, Anu
2015	Iris localization based on integro-differential operator for unconstrained infrared iris images	Gupta, Anu; Asati, Abhijit
2015	An Iris localization method for noisy infrared iris images	Gupta, Anu; Asati, Abhijit
2016	Leakage Immune 9T-SRAM Cell in Sub-threshold Region	Gupta, Anu; Asati, Abhijit
2015	Leakage Immune Modified Pass Transistor Based 8T SRAM Cell in Subthreshold Region	Gupta, Anu; Asati, Abhijit
2010	Low Power Cascaded Three Stage Amplifier with Multipath Nested Miller Compensation	Chaturvedi, Nitin; Gupta, Anu
2013	Low power low noise bio-amplifier with adjustable gain for digital bio-signals acquisition systems	Gupta, Anu
2009-05	Low Power Temperature Compensated CMOS Current Reference	Gupta, Anu
2017-09	Low-latency median filter core for hardware implementation of 5 × 5 median filtering	Gupta, Anu; Asati, Abhijit
2019-09	Low-voltage, low-power SRAM circuits using subthreshold design technique	Asati, Abhijit; Gupta, Anu
2018-10	Memory-efficient architecture of circle Hough transform and its FPGA implementation for iris localisation	Gupta, Anu; Asati, Abhijit
2014	A Novel Design of Ternary Full Adder Using CNTFETs	Gupta, Anu
2014	Novel design of ternary magnitude comparator using CNTFETs	Gupta, Anu
2009	A Novel Dynamic Current Boosting Technique for Enhancement of Settling Time and Elimination of Slewing of CMOS Amplifiers	Gupta, Anu
2016	A Novel Edge-Map Creation Approach for Highly Accurate Pupil Localization in Unconstrained Infrared Iris Images	Gupta, Anu; Asati, Abhijit
2010	A novel hardware efficient Digital Neural Network architecture implemented in 130nm technology	Gupta, Anu
2018	Novel low-power and stable SRAM cells for sub-threshold operation at 45 nm	Gupta, Anu; Asati, Abhijit
2011	Novel Method To Implement High Frequency All Digital Phase-Locked Loop On FPGA	Gupta, Anu
2009-08	A Novel Redundant Binary Number to Natural Binary Number Converter	Gupta, Anu; Shekhar, Chandra; Asati, Abhijit

Showing results 33 to 52 of 72 < previous next >