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BITS Pilani Institutional Repository
Browsing by Author Vidhyadharan, Sanjay
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Showing results 12 to 23 of 23
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Issue Date
Title
Author(s)
2021-05
Memristor–CMOS hybrid ultra-low-power high-speed multivibrators
Vidhyadharan, Sanjay
2021-04
Mux Based Ultra-Low-Power Ternary Adders and Multiplier implemented with CNFET and 45 nm MOSFETs
Vidhyadharan, Sanjay
2019-06
A nanoscale gate overlap tunnel FET (GOTFET) based improved double tail dynamic comparator for ultra-low-power VLSI applications
Vidhyadharan, Sanjay
2020-07
Novel gate-overlap tunnel FET based innovative ultra-low-power ternary flash ADC
Vidhyadharan, Sanjay
2019
Novel Low and High Threshold TFET Based NTI and PTI Cells Benchmarked with Standard 45 nm CMOS Technology for Ternary Logic Applications
Vidhyadharan, Sanjay
2021-05
A novel ultra-low-power CNTFET and 45 nm CMOS based ternary SRAM
Vidhyadharan, Sanjay
2020-03
A novel ultra-low-power gate overlap tunnel FET (GOTFET) dynamic adder
Vidhyadharan, Sanjay
2019-02
Optimization of the Tunnel FET Device Structure for Achieving Circuit Performance Better Than the Current Standard 45 nm CMOS Technology
Vidhyadharan, Sanjay
2020-07
Suppression of Ambipolar Behavior and Simultaneous Improvement in RF Performance of Gate-Overlap Tunnel Field Effect Transistor (GOTFET) Devices
Vidhyadharan, Sanjay
2020-10
TiO2−x–TiO2 Memristor Applications for Programmable Analog VLSI Circuits at 45 nm CMOS Technology Node
Vidhyadharan, Sanjay
2021-01
An ultra-low-power CNFET based dual VDD ternary dynamic Half Adder
Vidhyadharan, Sanjay
2020-11
An ultra-low-power CNFET-based improved Schmitt triggerdesign for VLSI sensor applications
Vidhyadharan, Sanjay