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Title: | Design of Well Doping Profile for Improved Breakdown and Mixed-Signal Performance of STI-Type DePMOS Device |
Authors: | Rao, V. Ramgopal |
Keywords: | EEE DePMOS Device Avalanche breakdown Drain extended MOSFET (DeMOS) Input-output (I/O) Mixed-signal perfor- mance Well doping profile |
Issue Date: | Dec-2015 |
Publisher: | IEEE |
Abstract: | Shallow-trench isolation drain extended pMOS (STI-DePMOS) devices show a distinct two-stage breakdown. The impact of p-well and deep-n-well doping profile on breakdown characteristics is investigated based on TCAD simulations. Design guidelines for p-well and deep-n-well doping profile are developed to shift the onset of the first-stage breakdown to a higher drain voltage and to avoid vertical punch-through leading to early breakdown. An optimal ratio between the OFF-state breakdown voltage and the ON-state resistance could be obtained. Furthermore, the impact of p-well/deep-n-well doping profile on the figure of merits of analog and digital performance is studied. This paper aids in the design of STI drain extended MOSFET devices for widest safe operating area and optimal mixed-signal performance in advanced system-on-chip input-output process technologies. |
URI: | https://ieeexplore.ieee.org/document/7307156 http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12607 |
Appears in Collections: | Department of Electrical and Electronics Engineering |
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