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dc.contributor.authorRao, V. Ramgopal-
dc.date.accessioned2023-10-25T06:53:55Z-
dc.date.available2023-10-25T06:53:55Z-
dc.date.issued2015-08-
dc.identifier.urihttps://ieeexplore.ieee.org/abstract/document/7116489-
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12615-
dc.description.abstractThis letter analyzes the width dependence of gate current observed in nMOS transistors fabricated using the 28-nm gate-first CMOS process. It is experimentally shown that the gate current density is ~10× lower for 80-nm wide high permittivity (K) dielectrics and metal gate nMOS transistors compared with 1-μm wider ones. The physical mechanism responsible for this anomalous width dependence is identified and attributed to the reduction in the average number of positively charged oxygen vacancies present in HfO 2 for narrow width transistors.en_US
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectEEEen_US
dc.subjectMOS transistoren_US
dc.subjectDevice scalingen_US
dc.subjectTrap assisted tunnelingen_US
dc.subjectOxygen vacanciesen_US
dc.titleAnomalous Width Dependence of Gate Current in High- K Metal Gate nMOS Transistorsen_US
dc.typeArticleen_US
Appears in Collections:Department of Electrical and Electronics Engineering

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