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DC Field | Value | Language |
---|---|---|
dc.contributor.author | Rao, V. Ramgopal | - |
dc.date.accessioned | 2023-10-26T04:14:18Z | - |
dc.date.available | 2023-10-26T04:14:18Z | - |
dc.date.issued | 2015-02 | - |
dc.identifier.uri | https://ieeexplore.ieee.org/abstract/document/7001667 | - |
dc.identifier.uri | http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12620 | - |
dc.description.abstract | In this brief, the random dopant fluctuation (RDF)-induced threshold voltage (VT) variability, ON current (ION) variability, and VT mismatch in undoped channel Si gate-all-around (GAA) n-nanowire MOSFETs (n-NWFETs) are studied using coupled 3-D statistical device simulations considering quantum corrected room temperature drift-diffusion transport. The RDFs are introduced in the Si NWFET tetrahedral device grid by a 3-D atomistic MonteCarlo technique. The RDF due to discrete random dopants located in the source (S)/drain (D) extension and channel regions of Si GAA n-NWFET are found to impact the device characteristic variability. The numerical VT mismatch analysis and comparison with the Si n-NWFET total AVT measurement data from the literature reveal that RDF still plays a significant source for device random fluctuations in undoped channel Si GAA n-NWFETs. The numerical VT mismatch study indicates the fact that complete suppression of RDF induced device random variability in undoped channel fully depleted MOS devices is still going to be a challenge, as long as doped S/D regions are employed. | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEEE | en_US |
dc.subject | EEE | en_US |
dc.subject | Characteristic fluctuations | en_US |
dc.subject | CMOS technologies | en_US |
dc.subject | Silicon nanowire FET (NWFET) | en_US |
dc.title | Random Dopant Fluctuation Induced Variability in Undoped Channel Si Gate all Around Nanowire n-MOSFET | en_US |
dc.type | Article | en_US |
Appears in Collections: | Department of Electrical and Electronics Engineering |
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