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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/12685
Title: A Novel Bottom Spacer FinFET Structure for Improved Short-Channel, Power-Delay, and Thermal Performance
Authors: Rao, V. Ramgopal
Keywords: EEE
Bulk fin-shaped field-effect transistor (FinFET)
Electrothermal modeling
Fin-shaped field-effect transistor (FET) (FinFET)
Width quantization
Issue Date: Jun-2010
Publisher: IEEE
Abstract: For the first time, we propose a novel bottom spacer fin-shaped field-effect-transistor (FinFET) structure for logic applications suitable for system-on-chip (SoC) requirements. The proposed device achieved improved short-channel, power-delay, and self-heating performance compared with standard silicon-on-insulator FinFETs. Process aspects of the proposed device are also discussed in this paper. Physical insight into the improvement toward the short-channel performance and power dissipation is given through a detailed 3-D device/mixed-mode simulation. The self-heating behavior of the proposed device is compared with standard FinFETs by using detailed electrothermal simulations. The proposed device requires an extra process step but enables smaller electrical width for self-loaded circuits and is an excellent option for SoC applications.
URI: https://ieeexplore.ieee.org/abstract/document/5446394
http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12685
Appears in Collections:Department of Electrical and Electronics Engineering

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