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dc.contributor.authorRao, V. Ramgopal-
dc.date.accessioned2023-10-28T03:57:55Z-
dc.date.available2023-10-28T03:57:55Z-
dc.date.issued2010-02-
dc.identifier.urihttps://ieeexplore.ieee.org/document/5350732-
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12691-
dc.description.abstractIn this paper, the optimization issues of various drain-extended devices are discussed for input/output applications. The mixed-signal performance, impact of process variations, and gate oxide reliability of these devices are compared. Lightly doped drain MOS (LDDMOS) was found to have a moderate performance advantage as compared to shallow trench isolation (STI) and non-STI drain-extended MOS (DeMOS) devices. Non-STI DeMOS devices have improved circuit performance but suffer from the worst gate oxide reliability. Incorporating an STI region underneath the gate-drain overlap improves the gate oxide reliability, although it degrades the mixed-signal characteristics of the device. The single-halo nature of DeMOS devices has been shown to be effective in suppressing the short-channel effects.en_US
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectEEEen_US
dc.subjectDrain-extended MOSFET (DeMOS)en_US
dc.subjectHot carrieren_US
dc.subjectInput/outputen_US
dc.subjectLightly doped drain MOS (LDDMOS)en_US
dc.subjectMixed-signalen_US
dc.subjectReduced surface field (RESURF)en_US
dc.titleMixed-Signal Performance of Various High-Voltage Drain-Extended MOS Devicesen_US
dc.typeArticleen_US
Appears in Collections:Department of Electrical and Electronics Engineering

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