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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/12725
Title: Optimization of sub 100 nm Γ-gate Si-MOSFETs for RF applications
Authors: Rao, V. Ramgopal
Keywords: EEE
MOSFETs
CMOS technologies
Issue Date: Apr-2005
Abstract: This paper presents characterization and simulation studies on the RF performance of the Γ (Gamma) gate MOSFETs. The Γ-gate MOSFET offers the advantage of reduced gate resistance, a critical parameter in high frequency circuits. The aim of this study is to identify the optimum Γ-gate extension length from the gate and drain resistance point of view in aggressively scaled CMOS.
URI: http://repository.ias.ac.in/79790/
http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12725
Appears in Collections:Department of Electrical and Electronics Engineering

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