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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/12725
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dc.contributor.authorRao, V. Ramgopal-
dc.date.accessioned2023-10-30T09:20:53Z-
dc.date.available2023-10-30T09:20:53Z-
dc.date.issued2005-04-
dc.identifier.urihttp://repository.ias.ac.in/79790/-
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12725-
dc.description.abstractThis paper presents characterization and simulation studies on the RF performance of the Γ (Gamma) gate MOSFETs. The Γ-gate MOSFET offers the advantage of reduced gate resistance, a critical parameter in high frequency circuits. The aim of this study is to identify the optimum Γ-gate extension length from the gate and drain resistance point of view in aggressively scaled CMOS.en_US
dc.language.isoenen_US
dc.subjectEEEen_US
dc.subjectMOSFETsen_US
dc.subjectCMOS technologiesen_US
dc.titleOptimization of sub 100 nm Γ-gate Si-MOSFETs for RF applicationsen_US
dc.typeArticleen_US
Appears in Collections:Department of Electrical and Electronics Engineering

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