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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/12733
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dc.contributor.authorRao, V. Ramgopal-
dc.date.accessioned2023-10-30T10:19:59Z-
dc.date.available2023-10-30T10:19:59Z-
dc.date.issued2009-
dc.identifier.urihttps://iopscience.iop.org/article/10.1143/JJAP.48.054501-
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12733-
dc.description.abstractA significantly increased subthreshold leakage is observed in devices with high-k gate dielectric due to gate fringing field effects. Further, the drain to body band-to-band tunnelling leakage (BTBT) current also increases with the value of dielectric constant (k), particularly for high-k p-channel metal–oxide–semiconductor field-effect transistors (p-MOSFETs). We show that this increase with k is due to a gate-to-drain fringing field induced increase in the local electric field, across the gate overlap region of drain junction. Due to these reasons, the circuit technique of applying an optimum body bias to minimize the total leakage, is least effective in high-k p-MOSFETs. Our results also show that, because of the degraded subthreshold characteristics in high-k MOSFETs, the effectiveness of body bias in controlling the gate leakage is further reduced for scaled CMOS technologies employing high-k gate dielectric.en_US
dc.language.isoenen_US
dc.publisherIOPen_US
dc.subjectEEEen_US
dc.subjectp-MOSFETsen_US
dc.subjectBand-to-band tunnelling leakage (BTBT)en_US
dc.subjectMetal–oxide–semiconductor field-effect transistor (MOSFET)en_US
dc.titleOptimum Body Bias Constraints for Leakage Reduction in High-k Complementary Metal–Oxide–Semiconductor Circuitsen_US
dc.typeArticleen_US
Appears in Collections:Department of Electrical and Electronics Engineering

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