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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/12747
Title: Analysis of Floating Body Effects in Thin Film Conventional and Single Pocket SOI MOSFETs using the GIDL Current Technique
Authors: Rao, V. Ramgopal
Keywords: EEE
Transistors
MOSFETs
Los Angeles Council
Tunneling
Leakage current
Current measurement
Low voltage
CMOS technology
Issue Date: Jul-2001
Publisher: IEEE
Abstract: In this paper, we present an analysis of floating body effects in lateral asymmetric channel (LAC) and conventional homogeneously doped channel (uniform) SOI MOSFETs using a novel gate-induced-drain-leakage (GIDL) current technique. The parasitic bipolar current gain /spl beta/ has been experimentally measured for LAC and uniform SOI MOSFETs using the GIDL current technique. The lower parasitic bipolar current gain observed in LAC SOI MOSFETs is explained with the help of 2D device simulations.
URI: https://ieeexplore.ieee.org/document/941497
http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12747
Appears in Collections:Department of Electrical and Electronics Engineering

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