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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/12799
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dc.contributor.authorRao, V. Ramgopal-
dc.date.accessioned2023-11-02T05:39:04Z-
dc.date.available2023-11-02T05:39:04Z-
dc.date.issued2015-
dc.identifier.urihttps://ieeexplore.ieee.org/document/7285158-
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12799-
dc.description.abstractConventional CMOS and MEMS technologies usually employ top-down fabrication methodologies for high volume manufacturing. However, as the CMOS technologies are scaled down, there are many challenges owing to its variability, reliability and power issues. Some of these issues in CMOS and MEMS technologies can be better addressed by employing a host of bottom-up nanotechnology approaches through innovative process integration strategies. This calls for an intelligent integration of diverse technologies, materials and processes on the same die or in a package for realization of future smart systems. Here we present some of these integration methodologies where completely diverse platforms, materials and approaches are brought together in order to realize a targeted system functionality.en_US
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectEEEen_US
dc.subjectTop-downen_US
dc.subjectBottom-upen_US
dc.subjectSelf-assemblyen_US
dc.subjectZinc Porphyrinen_US
dc.subjectMEMS/NEMSen_US
dc.titleBottom-up meets top down: An integrated approach for nano-scale devicesen_US
dc.typeArticleen_US
Appears in Collections:Department of Electrical and Electronics Engineering

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