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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/12820
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dc.contributor.authorRao, V. Ramgopal-
dc.date.accessioned2023-11-02T10:38:39Z-
dc.date.available2023-11-02T10:38:39Z-
dc.date.issued2011-
dc.identifier.urihttps://ieeexplore.ieee.org/document/5784498-
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12820-
dc.description.abstractFor the first time we have reported thermal failure of FinFET devices related to fin thickness mismatch, under the normal operating condition. Pre and post failure characteristics are investigated. Furthermore, a detailed physical insight towards heat transport in a complex back-end of line (BEOL) of a logic circuit network is given for FinFET and extreme thin silicon on insulator (ETSOI) devices. Self heating behavior of both the FinFET and ETSOI devices is compared. Moreover, layout, device and technology design guidelines (based on complex 3D TCAD) are given for robust thermal management and electrical overstress / electrostatic discharge (EOS/ESD) reliability.en_US
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectEEEen_US
dc.subjectBEOL reliabilityen_US
dc.subjectFinFETen_US
dc.subjectExtremely thin SOI (ETSOI)en_US
dc.subjectElectrothermalen_US
dc.subjectElectrostatic discharge (ESD)en_US
dc.titleOn the thermal failure in nanoscale devices: Insight towards heat transport including critical BEOL and design guidelines for robust thermal management & EOS/ESD reliabilityen_US
dc.typeArticleen_US
Appears in Collections:Department of Electrical and Electronics Engineering

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