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DC Field | Value | Language |
---|---|---|
dc.contributor.author | Rao, V. Ramgopal | - |
dc.date.accessioned | 2023-11-02T11:19:51Z | - |
dc.date.available | 2023-11-02T11:19:51Z | - |
dc.date.issued | 2010-05 | - |
dc.identifier.uri | https://ieeexplore.ieee.org/document/5488723 | - |
dc.identifier.uri | http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12829 | - |
dc.description.abstract | We present 3D device modeling of RESURF or non-STI type DeNMOS device under ESD conditions. The impact of base push-out, pulse-to-pulse instability and electrical imbalance on the various phases of filamentation is discussed. A new phenomenon called “week NPN action” and the cause of early and fast failure is identified. A modification of the device is proposed which achieved an improvement of ~5X in failure threshold (I T2 ) and ~2X in ESD window without degrading its I/O performance. | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEEE | en_US |
dc.subject | EEE | en_US |
dc.subject | Drain-extended MOSFET (DeMOS) | en_US |
dc.subject | ESD Failure | en_US |
dc.subject | Space charge buildup | en_US |
dc.subject | Pulse-to-pulse instability | en_US |
dc.title | On the failure mechanism and current instabilities in RESURF type DeNMOS device under ESD conditions | en_US |
dc.type | Article | en_US |
Appears in Collections: | Department of Electrical and Electronics Engineering |
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