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dc.contributor.authorRao, V. Ramgopal-
dc.date.accessioned2023-11-03T09:02:14Z-
dc.date.available2023-11-03T09:02:14Z-
dc.date.issued2009-
dc.identifier.urihttps://ieeexplore.ieee.org/document/5166122?arnumber=5166122-
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12843-
dc.description.abstractThis work establishes a novel circuit simulation methodology for organic thin film transistors (OTFTs). Because of a lack of well developed physical models for OTFTs and due to the limitations of conventional parameter extraction techniques, the approaches presented in this work come in handy for circuit designers. The first approach uses a look-up table (LUT) model, which is implemented in a general purpose public-domain circuit simulator SEQUEL (solver for circuit equations with user-defined elements). In the second approach, circuit simulation is performed using equivalent SPICE parameters, which are extracted using a global optimization technique namely particle swarm optimization (PSO) algorithm. A good match has been observed between LUT simulations and SPICE based circuit simulations for both DC and transient cases.en_US
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectEEEen_US
dc.subjectLook-up table (LUT)en_US
dc.subjectOrganic thin film transistor (OTFT)en_US
dc.subjectParticle swarm optimization (PSO)en_US
dc.subjectSEQUELen_US
dc.titleDC & transient circuit simulation methodologies for organic electronicsen_US
dc.typeArticleen_US
Appears in Collections:Department of Electrical and Electronics Engineering

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