Please use this identifier to cite or link to this item:
http://dspace.bits-pilani.ac.in:8080/jspui/handle/123456789/12844| Title: | Automated design and optimization of circuits in emerging technologies |
| Authors: | Rao, V. Ramgopal |
| Keywords: | EEE Design optimization Table lookup Integrated circuit technology Design methodology Voltage Temperature |
| Issue Date: | 2009 |
| Publisher: | IEEE |
| Abstract: | A novel table-based environment for automatic design and optimization of FinFET circuits is demonstrated. A new accurate look-up table (LUT) technique is implemented in a circuit simulator and integrated with particle swarm optimization algorithm for efficient circuit designs in novel devices. Op-amp circuits are designed and optimized to demonstrate the accuracy and usefulness of the proposed platform. Further, it is shown that the proposed design methodology can take into account variations in process, supply voltage, and temperature |
| URI: | https://ieeexplore.ieee.org/document/4796530 http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12844 |
| Appears in Collections: | Department of Electrical and Electronics Engineering |
Files in This Item:
There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.