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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/12866
Title: Effectiveness of Optimum Body Bias for Leakage Reduction in High-K CMOS Circuits
Authors: Rao, V. Ramgopal
Keywords: EEE
Optimal body bias (OBB)
CMOS integrated circuits
Issue Date: 2004
Publisher: SSDM
Abstract: Optimal body bias (OBB) has been recently shown to be effective in minimizing the exponentially increasing drain leakage in deep submicron technologies [1], [2]. High permittivity (high K) gate dielectrics, proposed to eliminate gate direct tunnelling leakage current, however increase the drain leakage due to FIBL [3], [4]. In this work, we study the applicability of OBB in minimising the drain leakage for high-K gate dielectric MOSFETs. We observe that in high-K p-MOSFETs, the band-to-band tunnelling (BTBT) current increases dramatically with increasing K. This is due to the combined effect of fringing fields and higher density of states in valance band, as shown for the first time in this work. We show that this effect renders the important circuit technique of applying OBB less effective in high-K CMOS circuits.
URI: https://confit.atlas.jp/guide/organizer/ssdm/ssdm2004/subject/P2-16/search?page=34
http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12866
Appears in Collections:Department of Electrical and Electronics Engineering

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