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http://dspace.bits-pilani.ac.in:8080/jspui/handle/123456789/12898Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Rao, V. Ramgopal | - |
| dc.date.accessioned | 2023-11-07T09:34:46Z | - |
| dc.date.available | 2023-11-07T09:34:46Z | - |
| dc.date.issued | 2000 | - |
| dc.identifier.uri | https://ieeexplore.ieee.org/document/911895 | - |
| dc.identifier.uri | http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12898 | - |
| dc.description.abstract | SOI MNSFETs with channel lengths down to 100 nm and having a Jet Vapor Deposited (JVD) silicon nitride (Si/sub 3/N/sub 4/) gate dielectric are fabricated and characterized. The JVD MNSFETs show comparable performance in comparison to conventional SiO/sub 2/ SOI-MOSFETs, in terms of low gate leakage, Si/sub 3/N/sub 4//Si interface quality and I/sub on//I/sub off/ ratio. In addition, the MNSFETs show better hot carrier reliability compared to conventional MOSFETs. Our results explore the worthiness of JVD Si/sub 3/N/sub 4/ as gate dielectric for future low power ULSI applications. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | IEEE | en_US |
| dc.subject | EEE | en_US |
| dc.subject | MOSFETs | en_US |
| dc.subject | Gate leakage | en_US |
| dc.subject | Hot carriers | en_US |
| dc.subject | Transconductance | en_US |
| dc.subject | Thickness measurement | en_US |
| dc.subject | Silicon | en_US |
| dc.title | Reliability studies on sub 100 nm SOI-MNSFETs | en_US |
| dc.type | Article | en_US |
| Appears in Collections: | Department of Electrical and Electronics Engineering | |
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