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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/handle/123456789/12901
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dc.contributor.authorRao, V. Ramgopal-
dc.date.accessioned2023-11-07T10:30:32Z-
dc.date.available2023-11-07T10:30:32Z-
dc.date.issued1999-
dc.identifier.urihttps://ieeexplore.ieee.org/document/799344-
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12901-
dc.description.abstractThe effects of channel engineering on device performance have been extensively investigated. The lateral asymmetric channel (LAC) MOSFETs show significantly higher I/sub dsat/ and g/sub msat/, lower I/sub off/, and superior short-channel performance compared with double-halo (DH) and conventional MOSFETs by effectively utilizing the velocity overshoot effects. It is demonstrated that the device switching speed of the LAC device at V/sub DD/=0.6 V is equivalent to that of a conventional device operated at V/sub DD/=1.5 V.en_US
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectEEEen_US
dc.subjectPower engineering and energyen_US
dc.subjectPower suppliesen_US
dc.subjectLos Angeles Councilen_US
dc.subjectMOSFETsen_US
dc.subjectDH-HEMTsen_US
dc.subjectMOS devicesen_US
dc.titleChannel engineering for high speed sub-1.0 V power supply deep sub-micron CMOSen_US
dc.typeArticleen_US
Appears in Collections:Department of Electrical and Electronics Engineering

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