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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/handle/123456789/12903
Title: Capacitance Degradation due to Fringing Field in Deep Sub-Micron MOSFETs with High-K Gate Dielectrics
Authors: Rao, V. Ramgopal
Keywords: EEE
Capacitance
Degradation
MOSFETs
Dielectrics and electrical insulation
High-K gate dielectrics
Gate leakage
MOS devices
Issue Date: Sep-1999
Publisher: IEEE
Abstract: High-K gate dielectrics have been under extensive investigation for use in sub-lOOnm MOSFETs to suppress gate leakage. However, thicker gate dielectrics can result in degradation of the electrical performance due to increased fringing fields from the gate to source/drain. In this paper, the capacitance degradation resulting from this effect is analyzed and a simple technique to model this effect is presented.
URI: https://ieeexplore.ieee.org/document/1505464
http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12903
Appears in Collections:Department of Electrical and Electronics Engineering

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