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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/12907
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dc.contributor.authorRao, V. Ramgopal-
dc.date.accessioned2023-11-07T11:15:27Z-
dc.date.available2023-11-07T11:15:27Z-
dc.date.issued1997-10-
dc.identifier.uri10.1109/ESSDERC.1997.194506-
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12907-
dc.description.abstractIntroducing a concept of Electric-Field-Tailoring in vertical grown MOSFETs significant improvements concerning supply voltage, current and speed are possible. Based on vertical Silicon MOSFETs with sub-100nm channel lengths Planar-Doped-BarrierFETs were fabricated. Investigations on electrical characteristics and carrier transport show the predicted improvements compared to classical MOSFETs.en_US
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.subjectEEEen_US
dc.subjectMOSFETsen_US
dc.titleThe Planar-Doped-Barrier FET:MOSFET Overcomes Conventional Limitationsen_US
dc.typeArticleen_US
Appears in Collections:Department of Electrical and Electronics Engineering

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