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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/handle/123456789/12908
Title: Simulation, fabrication and characterization of high performance planar-doped-barrier sub 100 nm channel MOSFETs
Authors: Rao, V. Ramgopal
Keywords: EEE
Fabrication
MOSFETs
Molecular beam epitaxial growth
Doping profiles
Hot carriers
CMOS technology
Issue Date: Dec-1997
Publisher: IEEE
Abstract: In this paper we present experimental and simulation results on planar-doped-barrier MOSFETs (PDBFETs) and show the advantages that arise from the channel delta doping. Early and higher magnitude of velocity overshoot, suppression of avalanche multiplication, reduced hot-carrier problems are some of the advantages offered by PDBFETs over the conventional homogeneously doped MOSFETs in the sub 100 nm regime. Our low-temperature characterizations show clear ballistic transport in the fabricated 85 nm channel MOSFETs.
URI: https://ieeexplore.ieee.org/document/650505
http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/12908
Appears in Collections:Department of Electrical and Electronics Engineering

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