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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Mishra, Abhishek | - |
| dc.date.accessioned | 2024-05-07T06:46:06Z | - |
| dc.date.available | 2024-05-07T06:46:06Z | - |
| dc.date.issued | 2021 | - |
| dc.identifier.uri | https://www.scitepress.org/publishedPapers/2021/106259/pdf/index.html | - |
| dc.identifier.uri | http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/14742 | - |
| dc.description.abstract | In this paper we propose a Simulated Annealing (SA) based energy-efficient task scheduling algorithm for multi-core processors, the Simulated Annealing Energy Efficient Task Scheduling Algorithm (SAEETSA), and compare it with another algorithm, the Energy Efficient Task Scheduling Algorithm (EETSA). Our results show that for dual-core processors the SAEETSA algorithm is taking up to 16.78% less energy as compared to the EETSA algorithm, and for tri-core processors, the SAEETSA algorithm is taking up to 26.97% less energy as compared to the EETSA algorithm. 1 I | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | IJCCI | en_US |
| dc.subject | Computer Science | en_US |
| dc.subject | Multi-Core Processors | en_US |
| dc.subject | Randomized Algorithm | en_US |
| dc.subject | Scheduling | en_US |
| dc.subject | Simulated Annealing (SA) | en_US |
| dc.subject | Task Allocation | en_US |
| dc.title | A Simulated Annealing based Energy Efficient Task Scheduling Algorithm for Multi-core Processors | en_US |
| dc.type | Article | en_US |
| Appears in Collections: | Department of Computer Science and Information Systems | |
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