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http://dspace.bits-pilani.ac.in:8080/jspui/handle/123456789/15964Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Gadgil, Sharvani | - |
| dc.date.accessioned | 2024-10-04T11:27:04Z | - |
| dc.date.available | 2024-10-04T11:27:04Z | - |
| dc.date.issued | 2023 | - |
| dc.identifier.uri | http://hdl.handle.net/10603/589337 | - |
| dc.description | Under the supervision of Dr. Chetan Kumar V | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | BITS PILANI, Hyderabad campus | en_US |
| dc.subject | Electrical engineering | en_US |
| dc.subject | Carbon nanotube | en_US |
| dc.subject | CNFET | en_US |
| dc.subject | Ternary logic processor | en_US |
| dc.title | Design of a power-efficient carbon nanotube field effect transistor (CNFET)-based ternary logic processor | en_US |
| dc.type | Thesis | en_US |
| Appears in Collections: | Department of Electrical and Electronics Engineering | |
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