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DC Field | Value | Language |
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dc.contributor.author | Hazra, Arnab | - |
dc.date.accessioned | 2024-11-28T09:20:32Z | - |
dc.date.available | 2024-11-28T09:20:32Z | - |
dc.date.issued | 2023-09 | - |
dc.identifier.uri | https://link.springer.com/article/10.1007/s10854-023-11288-8 | - |
dc.identifier.uri | http://dspace.bits-pilani.ac.in:8080/jspui/handle/123456789/16527 | - |
dc.description.abstract | The graphene field-effect transistor (GFET) has the severe drawback of the device turn off owing to the zero band gap of graphene that results in a limited on/off current ratio at room temperature. In this report, we propose a hybrid channel of few graphene oxide (GO) implanted with undoped p-type anatase TiO2 nanoparticles (~16 nm) to achieve a depletion type (normally-on) FET with very high on/off ratio at room temperature (300 K). The percentage of GO and TiO2 is optimized based on the performance of FET where 99 vol% GO (0.2 wt%) having 1 vol% TiO2 (0.14 M) exhibited on/off current ratio of 2.8 × 103 (ION at VGS=0 V and IOFF at VGS=1.2 V), the acceptable transconductance of 0.286 µS and high transport gap of 54.2 meV at room temperature. The remarkable performance improvement in GO/p-TiO2 hybrid FET is achieved by two distinct effects, i.e., (i) the hole accumulation in GO channel due to interfacial charge transfer between GO and p-TiO2 and (ii) the formation of high potential barrier in GO/p-TiO2/GO junctions near the Dirac point voltage. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Springer | en_US |
dc.subject | EEE | en_US |
dc.subject | Graphene field-effect transistor (GFET) | en_US |
dc.subject | GO/p-TiO2 | en_US |
dc.title | GO/p-TiO2 hybrid channel based depletion-mode field-effect transistors with On/Off ratio higher than 103 at room temperature | en_US |
dc.type | Article | en_US |
Appears in Collections: | Department of Electrical and Electronics Engineering |
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