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Title: | Influences of Source/Drain Extension Region on Thermal Behavior of Stacked Nanosheet FET |
Authors: | Mishra, Neeraj |
Keywords: | EEE Extension length Nanosheet FET Reliability Self-heating effect (SHE) Sheet stacking |
Issue Date: | Jan-2024 |
Publisher: | IEEE |
Abstract: | A well-calibrated numerical-simulation-based study reveals that an elongated extension region can be a notable approach for the self-heating mitigation of nanosheet FETs. It is observed that a longer extension length ( LEXT = 8 nm) reduces the ON current; however, it holds a smaller penalty in ION degradation (~10%) due to the self-heating effect (SHE). When the extension region is increased from 2 to 8 nm, a reduction of 16× in IOFF is observed along with a reduction of ~9 mV/dec in the subthreshold swing. On the contrary, a change in ~15 mV in VT is observed when LEXT is increased from 2 to 8 nm. Considering lattice heat due to SHE, intrinsic delay, unity-gain bandwidth, and the above-mentioned characteristic, the optimum LEXT would be 5–6 nm. The longer extension lengths (2–8-nm increase) provide a lesser transconductance ( gm ) degradation (~15%) due to SHE. It is observed that intrinsic capacitance Cgg reduces with an increment in LEXT (2–8 nm), which eventually reduces the propagation delay (~20%) with an improvement in noise margin too. It is worth noting that for a common source amplifier, a longer extension region of 8 nm will also provide ∼1.87× more voltage gain when compared with LEXT of 2 nm, which increases to ∼1.97× in self-heating condition due to a smaller degradation “ ΔG ” (from ~12.4% to ~6.6%) in gain with longer extension length |
URI: | https://ieeexplore.ieee.org/abstract/document/10403811 http://dspace.bits-pilani.ac.in:8080/jspui/handle/123456789/16735 |
Appears in Collections: | Department of Electrical and Electronics Engineering |
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