Design and Characterization of Bulk Driven MOS Varactor based VCO at Near Threshold Regime

Abstract

A wide tuning range, low VCO gain and a low PVT variations are the requirements for Ring Oscillators at near threshold voltages (NTV). Current starved ring oscillators (CSRO) have voltage headroom issues in NTV regime. A MOS varactor based single ended ring oscillator (SERO) is best suited for its full swing characteristics, wide tuning range and low power consumption. However, a high VCO gain and nonlinearity are its limitations. This paper proposes a bulk driven MOS varactor based SERO (BD-MOS) that gives low VCO gain and a linear tuning from 0 to VDD in NTV regime. Post layout simulations have been performed on parasitic extracted netlist using HSPICE in industrial 65nm CMOS process design kit (PDK). The design is based on an analysis of MOS varactor capacitance done using 2D-Synopsis TCAD mixed-mode simulations.