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Results 1-10 of 11 (Search time: 0.002 seconds).
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Issue Date
Title
Author(s)
2021-04
Mux Based Ultra-Low-Power Ternary Adders and Multiplier implemented with CNFET and 45 nm MOSFETs
Vidhyadharan, Sanjay
2021-05
A novel ultra-low-power CNTFET and 45 nm CMOS based ternary SRAM
Vidhyadharan, Sanjay
2023-01
Fast and Low-Power CMOS and CNFET based Hysteresis Voltage Comparator
Vidhyadharan, Sanjay
2020-11
An ultra-low-power CNFET-based improved Schmitt triggerdesign for VLSI sensor applications
Vidhyadharan, Sanjay
2020-01
Innovative multi-threshold gate-overlap tunnel FET (GOTFET) devices for superior ultra-low power digital, ternary and analog circuits at 45-nm technology node
Vidhyadharan, Sanjay
2021-01
An ultra-low-power CNFET based dual VDD ternary dynamic Half Adder
Vidhyadharan, Sanjay
2020-10
An innovative ultra-low voltage GOTFET based regenerative-latch Schmitt trigger
Vidhyadharan, Sanjay
2020-10
TiO2−x–TiO2 Memristor Applications for Programmable Analog VLSI Circuits at 45 nm CMOS Technology Node
Vidhyadharan, Sanjay
2019
Novel Low and High Threshold TFET Based NTI and PTI Cells Benchmarked with Standard 45 nm CMOS Technology for Ternary Logic Applications
Vidhyadharan, Sanjay
2020-03
A novel ultra-low-power gate overlap tunnel FET (GOTFET) dynamic adder
Vidhyadharan, Sanjay
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Author
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EEE
4
Carbon Nanotube Field-Effect Tran...
2
Analog VLSI Circuits
2
CMOS technology
2
Power-delay-product
2
Ternary half adder
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VLSI design
1
Band to band tunneling BtB
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Carbon nanotube field effect tran...
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2020
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