Please use this identifier to cite or link to this item:
http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/1904| Title: | Modelling of electrostatic discharge (ESD) protection circuits for CMOS ICS |
| Authors: | Gurunarayanan, S. |
| Keywords: | Physics Electrostatic Discharge (ESD) Electrothermal Simulation |
| Issue Date: | 3-Jan-2000 |
| Publisher: | BITS Pilani |
| Description: | Supervisor: Dr. Chandra Shekhar |
| URI: | http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/1904 |
| Appears in Collections: | Department of Physics |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| modelling-of-electrostatic-discharge-(esd)-protection-circuits-for-cmos-ics.pdf Restricted Access | 4.31 MB | Adobe PDF | View/Open Request a copy |
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