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Issue Date
Title
Author(s)
2015
Power-aware Design of Logarithmic Prefix Adders in Sub-threshold Regime: A Comparative Analysis
Gupta, Anu
2015-04
Hardware-efficient low-power 2-bit ternary ALU design in CNTFET technology
Gupta, Anu
2015
Power-aware Design of Logarithmic Prefix Adders in Sub-threshold Regime: A Comparative Analysis
Gupta, Anu
;
Asati, Abhijit
2014
Analysis & implementation of ultra low-power 4-bit CLA in subthreshold regime
Gupta, Anu
;
Asati, Abhijit
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Author
2
Asati, Abhijit
Subject
1
Carry ripple adder(CRA)
1
Sub-threshold
1
Ternary ALU (TALU)
1
Ternary logic
.
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Date issued
3
2015
1
2014