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Issue Date
Title
Author(s)
2020-10
High-Level synthesis assisted design and verification framework for automotive radar processors
Asati, Abhijit
;
Shekhar, Chandra
2020
Area-optimal FPGA implementation of the YOLO v2 algorithm using High-Level Synthesis
Asati, Abhijit
;
Shekhar, Chandra
2015
FPGA implementation of interpolation techniques for thermistor linearization
Mishra, Puneet
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Author
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Asati, Abhijit
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Shekhar, Chandra
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Mishra, Puneet
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EEE
2
High-level synthesis (HLS)
1
Advanced driver assistance system...
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Convolutional Neural Networks (CNN)
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Interpolation
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Linearization
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MATLAB HDL coder
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MATLAB HDL Verifier
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Register transfer language (RTL)
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System on chip (SoC)
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Date issued
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2020
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2015
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