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Issue Date
Title
Author(s)
2011
Mixedmode circuit simulation of silicon and germanium nanowire MOSFETs - A comparative study
Chaubey, V.K.
2020-10
An innovative ultra-low voltage GOTFET based regenerative-latch Schmitt trigger
Vidhyadharan, Sanjay
2009
Highly robust nanoscale planar double-gate MOSFET device and SRAM cell immune to gate-misalignment and process variations
Rao, V. Ramgopal
2009
Benchmarking the device performance at sub 22 nm node technologies using an SoC framework
Rao, V. Ramgopal
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Author
2
Rao, V. Ramgopal
1
Chaubey, V.K.
1
Vidhyadharan, Sanjay
Subject
4
EEE
2
FinFETs
2
MOSFET circuits
2
Random access memory
1
45 nm CMOS technology
1
Doping profiles
1
Electrostatic discharges
1
Gate-Overlap Tunnel Field-Effect ...
1
Germanium
1
Integrated circuit interconnections
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Date issued
2
2010 - 2020
2
2009 - 2009
Has File(s)
4
false