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Issue Date	Title	Author(s)
2016	Design of non-volatile asynchronous circuit using CMOS-FDSOI/FinFET technologies	Chaturvedi, Nitin
2017	Design and analysis of 6T SRAM cell with NBL write assist technique using FinFET	Chaturvedi, Nitin
2017	A comparative analysis of read/write assist techniques on performance & margin in 6T SRAM cell design	Chaturvedi, Nitin
2018	Multiple Solutions for Reconfiguration to Address Partial Shading Losses in Solar Photovoltaic Arrays	Chaturvedi, Nitin
2017	An exploration of neuromorphic systems and related design issues/challenges in dark silicon era	Chaturvedi, Nitin
2019	A Novel Low Power Non-Volatile SRAM Cell with Self Write Termination	Chaturvedi, Nitin
2019	Design of a Robust Logic Gate using Magnetic Tunnel Junction	Chaturvedi, Nitin
2020	Twin-Coupled Sense Amplifier to improve margin in 1T-1MTJ based MRAM array	Chaturvedi, Nitin
2020	Design of a Low Power 11T-1MTJ Non-Volatile SRAM Cell with Half-Select Free Operation	Chaturvedi, Nitin
2020	Performance Analysis of GaN and ZnO Gate All Around Nanowire FET at sub-5nm Technology	Chaturvedi, Nitin
2021-05	Off-State Leakage Concern in Scaling Nanowire FETs	Chaturvedi, Nitin
2021	Design of a Low Power Approximate Adder based on Magnetic Tunnel Junction for Image Processing Applications	Chaturvedi, Nitin
2021	A Novel Decoder Design for Logic Computation in SRAM: CiM-SRAM	Chaturvedi, Nitin
2010-12	Adaptive Block Pinning Based: Dynamic Cache Partitioning for Multi-core Architectures	Chaturvedi, Nitin
2010	Adaptive Zone-Aware Multi-bank on Chip last level L2 Cache Partitioning for Chip Multiprocessors	Chaturvedi, Nitin
2013-07	Study of Various Factors Affecting Performance of Multi-Core Processors	Chaturvedi, Nitin
2014	Development of micronutrients rich homemade extruded food products with theincorporation of processed foxtail millet, wheat and chickpea	Chaturvedi, Nitin
2015	Selective Cache Line Replication Scheme in Shared Last Level Cache	Chaturvedi, Nitin
2015	An Efficient Data Access Policy in shared Last Level Cache	Chaturvedi, Nitin
2015-07	An adaptive migration–replication scheme (AMR) for shared cache in chip multiprocessors	Chaturvedi, Nitin