Collection's Items (Sorted by Submit Date in Descending order): 1781 to 1800 of 2012
| Issue Date | Title | Author(s) |
| 2018-11 | Power and Area Efficient Intelligent Hardware Design for Water Quality Applications | Gupta, Anu; Gupta, Rajiv |
| 2017 | Current-Mode PMOS capacitance multiplier | Gupta, Anu |
| 2017 | Quad-NMOS cross-coupling for linearity enhancement in high frequency continuous-time OTA-C filters with IM3 below −70 dB | Gupta, Anu |
| 2016 | A hardware optimized low power RNM compensated three stage operational amplifier with embedded capacitance multiplier compensation | Gupta, Anu |
| 2016 | To predict the impact of passive architecture on the temperature conditions inside a building using ANN | Gupta, Anu; Gupta, Rajiv |
| 2015 | Iris localization based on integro-differential operator for unconstrained infrared iris images | Gupta, Anu; Asati, Abhijit |
| 2013 | Low power low noise bio-amplifier with adjustable gain for digital bio-signals acquisition systems | Gupta, Anu |
| 2016 | Effectiveness of body bias & hybrid logic: An energy efficient approach to design adders in sub-threshold regime | Gupta, Anu; Asati, Abhijit |
| 2015 | Design and ASIC implementation of column compression Wallace/Dadda multiplier in sub-threshold regime | Gupta, Anu; Asati, Abhijit |
| 2015 | An Iris localization method for noisy infrared iris images | Gupta, Anu; Asati, Abhijit |
| 2014 | Novel design of ternary magnitude comparator using CNTFETs | Gupta, Anu |
| 2010 | A novel hardware efficient Digital Neural Network architecture implemented in 130nm technology | Gupta, Anu |
| 2013 | Studying Crosstalk Trends for Signal Integrity on Interconnects using Finite Element Modeling | Gupta, Anu |
| 2013 | Frequency compensation in two-stage operational amplifiers for achieving high 3-dB bandwidth | Gupta, Anu |
| 2013 | A high gain, high CMRR two-stage fully differential amplifier using gm/Id technique for bio-medical applications | Gupta, Anu |
| 2013 | Implementation of high speed energy efficient 4-bit binary CLA based incrementer /decrementer | Gupta, Anu |
| 2014 | Analysis & implementation of ultra low-power 4-bit CLA in subthreshold regime | Gupta, Anu; Asati, Abhijit |
| 2013 | Performance evaluation of CNTFET based Dynamic Ternary Content Addressable Memory cell | Gupta, Anu |
| 2013 | Performance Evaluation of CNTFET based Dynamic Dual Edge Triggered Register | Gupta, Anu |
| 2013 | Characterization of Logical Effort for Improved Delay | Gupta, Anu |
Collection's Items (Sorted by Submit Date in Descending order): 1781 to 1800 of 2012
