Collection's Items (Sorted by Submit Date in Descending order): 181 to 200 of 1603
| Issue Date | Title | Author(s) |
| 1998-05 | Charge injection using gate-induced-drain-leakage current for characterization of plasma edge damage in CMOS devices | Rao, V. Ramgopal |
| 1998-05 | Electric field tailoring in MBE-grown vertical sub-100 nm MOSFETs | Rao, V. Ramgopal |
| 1999-09 | A study of 100 nm channel length asymmetric channel MOSFET by using charge pumping | Rao, V. Ramgopal |
| 1999-09 | Low temperature-high pressure grown thin gate dielectrics for MOS applications | Rao, V. Ramgopal |
| 1999-05 | A direct charge pumping technique for spatial profiling of hot-carrier induced interface and oxide traps in MOSFETs | Rao, V. Ramgopal |
| 1999 | Gate Stack Architecture Analysis and Channel Engineering in Deep Sub-Micron MOSFETs | Rao, V. Ramgopal |
| 1999-07 | The impact of high-/spl kappa/ gate dielectrics and metal gate electrodes on sub-100 nm MOSFETs | Rao, V. Ramgopal |
| 1999-10 | Exploration of Velocity Overshoot in a High-Performance Deep Sub-0.1- m SOI MOSFET with Asymmetric Channel Profile | Rao, V. Ramgopal |
| 2000-04 | Device scaling effects on hot-carrier induced interface and oxide-trapped charge distributions in MOSFETs | Rao, V. Ramgopal |
| 2000-01 | A Comprehensive study of hot-carrier induced interface and oxide trap distributions in MOSFETs using a novel charge pumping technique | Rao, V. Ramgopal |
| 2001 | Comparison of Sub-Bandgap Impact Ionization in Sub-100 nm Conventional and Lateral Asymmetrical Channel nMOSFETs | Rao, V. Ramgopal |
| 2001-11 | A simple and direct technique for interface characterization of SOI MOSFETs and its application in hot carrier degradation studies in sub-100 nm JVD MNSFETs | Rao, V. Ramgopal |
| 2001-09 | Low temperature silicon nitride deposited by Cat-CVD for deep sub-micron metal–oxide–semiconductor devices | Rao, V. Ramgopal |
| 2001-07 | Multi-frequency transconductance technique for interface characterization of deep sub-micron SOI–MOSFETs | Rao, V. Ramgopal |
| 2001-07 | Sub-100 nm CMOS circuit performance with high-K gate dielectrics | Rao, V. Ramgopal |
| 2001-10 | A study of hot-carrier induced interface-trap profiles in lateral asymmetric channel MOSFETs using a novel charge pumping technique | Rao, V. Ramgopal |
| 2001-04 | Performance and Hot-Carrier Reliability of 100 nm Channel Length Jet Vapor Deposited Si3N4 MNSFETs | Rao, V. Ramgopal |
| 2002 | Status and Trends in Molecular Electronics | Rao, V. Ramgopal |
| 2002-05 | The effect of high-K gate dielectrics on deep submicrometer CMOS device and circuit performance | Rao, V. Ramgopal |
| 2002-06 | Optimization and realization of sub-100-nm channel length single halo p-MOSFETs | Rao, V. Ramgopal |
Collection's Items (Sorted by Submit Date in Descending order): 181 to 200 of 1603
