Collection's Items (Sorted by Submit Date in Descending order): 201 to 220 of 1603
Issue Date | Title | Author(s) |
2001-07 | Analysis of Floating Body Effects in Thin Film Conventional and Single Pocket SOI MOSFETs using the GIDL Current Technique | Rao, V. Ramgopal |
2001-07 | Analysis of floating body effects in thin film SOI MOSFETs using the GIDL current technique | Rao, V. Ramgopal |
2002-07 | Ultra-thin silicon nitride by hot wire chemical vapor deposition (HWCVD) for deep sub-micron CMOS technologies | Rao, V. Ramgopal |
2003-12 | Impact of lateral asymmetric channel doping on deep submicrometer mixed-signal device and circuit performance | Rao, V. Ramgopal |
2003-10 | CHISEL programming operation of scaled NOR flash EEPROMs-effect of voltage scaling, device scaling and technological parameters | Rao, V. Ramgopal |
2003-04 | Nitrogen dilution effects on structural and electrical properties of hot-wire-deposited a-SiN:H films for deep-sub-micron CMOS technologies | Rao, V. Ramgopal |
2003-04 | A new method to characterize border traps in submicron transistors using hysteresis in the drain current | Rao, V. Ramgopal |
2003-04 | Modeling of parasitic capacitances in deep submicrometer conventional and high-K dielectric MOS transistors | Rao, V. Ramgopal |
2003-04 | Highly conducting doped poly-Si deposited by hot wire CVD and its applicability as gate material for CMOS devices | Rao, V. Ramgopal |
2003 | Device and circuit performance issues with deeply scaled high-K MOS transistors | Rao, V. Ramgopal |
2003-08 | Reliability of ultrathin JVD silicon nitride MNSFETs under high field stressing | Rao, V. Ramgopal |
2004-06 | Silicon film thickness optimization for SOI-DTMOS from circuit performance considerations | Rao, V. Ramgopal |
2004-09 | The effect of LAC doping on deep submicrometer transistor capacitances and its influence on device RF performance | Rao, V. Ramgopal |
2005 | Deep sub-micron device and analog circuit parameter sensitivity to process variations with halo doping and its effect on circult linearity | Rao, V. Ramgopal |
2009 | Optimum Body Bias Constraints for Leakage Reduction in High-k Complementary Metal–Oxide–Semiconductor Circuits | Rao, V. Ramgopal |
2005-03 | Superior hot carrier reliability of single halo (SH) silicon-on-insulator (SOI) nMOSFET in analog applications | Rao, V. Ramgopal |
2005-07 | Semiconductor Science and Technology Design of a 0.1 µm single halo (SH) thin film silicon-on-insulator (SOI) MOSFET for analogue applications | Rao, V. Ramgopal |
2005-07 | Evaluation of the impact of layout on device and analog circuit performance with lateral asymmetric channel MOSFETs | Rao, V. Ramgopal |
2005-09 | Power-area evaluation of various double-gate RF mixer topologies | Rao, V. Ramgopal |
2005-09 | A new oxide trap-assisted NBTI degradation model | Rao, V. Ramgopal |
Collection's Items (Sorted by Submit Date in Descending order): 201 to 220 of 1603