Department of Electrical and Electronics Engineering
: [1603]
Collection home page
Collection's Items (Sorted by Submit Date in Descending order): 41 to 60 of 1603
| Issue Date | Title | Author(s) |
| 1997-10 | The Planar-Doped-Barrier FET:MOSFET Overcomes Conventional Limitations | Rao, V. Ramgopal |
| 1998-10 | Sub-0.18 /spl mu/m SOI MOSFETs using lateral asymmetric channel profile and Ge pre-amorphization salicide technology | Rao, V. Ramgopal |
| 1998-09 | A Study of the Effect of Plasma Etch Damage on Sub-Micron MOSFET's Flicker Noise Properties | Rao, V. Ramgopal |
| 1998 | Plasma process induced abnormal 1/f noise behavior in deep sub-micron MOSFETs | Rao, V. Ramgopal |
| 1999-09 | Capacitance Degradation due to Fringing Field in Deep Sub-Micron MOSFETs with High-K Gate Dielectrics | Rao, V. Ramgopal |
| 1999 | Hot-Carrier Induced Interface Degradation in Jet Vapor Deposited SiN MNSFETs as Studied by a Novel Charge Pumping Technique | Rao, V. Ramgopal |
| 1999 | Channel engineering for high speed sub-1.0 V power supply deep sub-micron CMOS | Rao, V. Ramgopal |
| 1999 | 100 nm channel length MNSFETs using a jet vapor deposited ultra-thin silicon nitride gate dielectric | Rao, V. Ramgopal |
| 2000 | Low temperature Hot-Wire CVD nitrides for deep sub-micron CMOS technologies | Rao, V. Ramgopal |
| 2000 | Reliability studies on sub 100 nm SOI-MNSFETs | Rao, V. Ramgopal |
| 2001 | Comparison of Sub-Bandgap Impact Ionization in Deep-Sub-Micron Conventional and Lateral Asymmetrical Channel nMOSFETs | Rao, V. Ramgopal |
| 2000-09 | Drain Bias Dependence of Gate Oxide Reliability in Conventional and Asymmetrical Channel MOSFETs in the Low Voltage Regime | Rao, V. Ramgopal |
| 2001-07 | Multi-Frequency Transconductance Technique for Interface Characterization of Deep Sub-Micron SOI-MOSFETs | Rao, V. Ramgopal |
| 2001 | Effect of Fringing Capacitances in Sub 100 nm MOSFET's with High-K Gate Dielectrics | Rao, V. Ramgopal |
| 2001 | Performance optimization of 60 nm channel length vertical MOSFETs using channel engineering | Rao, V. Ramgopal |
| 2001 | Reliability issues of ultra thin silicon nitride (a-SiN:H) by hot wire CVD for deep sub-micron CMOS technologies | Rao, V. Ramgopal |
| 2001-09 | Study of Degradation in Channel Initiated Secondary Electron Injection Regime | Rao, V. Ramgopal |
| 2001-09 | The Impact of High-K Gate Dielectrics on Sub 100 nm CMOS Circuit Performance | Rao, V. Ramgopal |
| 2001 | High Field Stressing Effects in JVD Nitride Capacitors | Rao, V. Ramgopal |
| 2001-10 | Characterization of lateral asymmetric channel (LAC) thin film SOI MOSFETs | Rao, V. Ramgopal |
Collection's Items (Sorted by Submit Date in Descending order): 41 to 60 of 1603
