Department of Electrical and Electronics Engineering
: [2012]
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Collection's Items (Sorted by Submit Date in Descending order): 501 to 520 of 2012
| Issue Date | Title | Author(s) |
| 2005 | Performance of Channel Engineered SDODEL MOSFET for Mixed Signal Applications | Rao, V. Ramgopal |
| 2006 | Analog Circuit Performance Issues with Aggressively Scaled Gate Oxide CMOS Technologies | Rao, V. Ramgopal |
| 2006 | Analog Device and Circuit Performance Degradation under Substrate Enhanced Hot Carrier Stress Conditions | Rao, V. Ramgopal |
| 2006-08 | The Effects of Varying Tilt Angle of Halo Implant on the Performance of Sub 100nm LAC MOSFETs | Rao, V. Ramgopal |
| 2007 | Pentacene Organic Field Effect Transistors on Flexible substrates with polymer dielectrics | Rao, V. Ramgopal |
| 2007 | Circuit Performance Improvement Using PDSOI-DTMOS Devices with a Novel Optimal Sizing Scheme Considering Body Parasitics | Rao, V. Ramgopal |
| 2007 | Parasitic Effects Depending on Shape of Spacer Region on FinFETs | Rao, V. Ramgopal |
| 2007 | Improving the DC performance of Bulk FinFETs by Optimum Body Doping | Rao, V. Ramgopal |
| 2007 | A Simple and Direct Method for Interface Characterization of OFETs | Rao, V. Ramgopal |
| 2007 | Patterned Microfluidic Channels Using Self-assembled Hydroxy-Phenyl Porphyrin Monolayer | Rao, V. Ramgopal |
| 2007 | Drain current model for undoped symmetric double-gate FETs using a velocity saturation model with exponent n=2 | Rao, V. Ramgopal |
| 2008-06 | Closed Form Current and Conductance Model for Symmetric Double-Gate MOSFETs using Field-dependent Mobility and Body Doping | Rao, V. Ramgopal |
| 2008 | Photoplastic NEMS with an Encapsulated Polysilicon Piezoresistor | Rao, V. Ramgopal |
| 2008 | Metallated Porphyrin Self Assembled Monolayers as Cu Diffusion Barriers for the Nano-Scale CMOS Technologies | Rao, V. Ramgopal |
| 2009 | The Electrochemical Society, find out more Analysis of Threshold Voltage Variations of FinFETs Relating to Short Channel Effects | Rao, V. Ramgopal |
| 2008 | Sub-20 nm gate length FinFET design: Can high-κ spacers make a difference? | Rao, V. Ramgopal |
| 2009 | Automated design and optimization of circuits in emerging technologies | Rao, V. Ramgopal |
| 2009 | DC & transient circuit simulation methodologies for organic electronics | Rao, V. Ramgopal |
| 2009-06 | Characterization of interface and oxide traps in Ge pMOSFETs based on DCIV technique | Rao, V. Ramgopal |
| 2009 | Hydroxy-phenyl Zn(II) porphyrin self-assembled monolayer as a diffusion barrier for copper-low k interconnect technology | Rao, V. Ramgopal |
Collection's Items (Sorted by Submit Date in Descending order): 501 to 520 of 2012
