Collection's Items (Sorted by Submit Date in Descending order): 61 to 80 of 1682
| Issue Date | Title | Author(s) |
| 2022-07 | Dedicated hardware architecture for localizing iris in VW images | Asati, Abhijit; Gupta, Anu |
| 2022-07 | Dedicated hardware architecture for localizing iris in VW images | Asati, Abhijit; Gupta, Anu |
| 2023 | Comparative Analysis of Phase/Frequency Detector in a Complete PLL System | Gupta, Anu; Shekhar, Chandra |
| 2023-07 | Efficient ASIC Implementation of Artificial Neural Network with Posit Representation of Floating-Point Numbers | Gupta, Anu; Gupta, Rajiv |
| 2024-02 | Comparative Analysis of D/A Converter Architectures for SAR ADC | Gupta, Anu; Shekhar, Chandra |
| 2024 | Design and implementation of successive approximation register data converter | Gupta, Anu; Chaturvedi, Nitin; Shekhar, Chandra |
| 2024 | A Novel Bootstrapped CMOS Switch with Minimized Sampling and Holding Error Using Sampling Window Error Analysis | Gupta, Anu; Shekhar, Chandra |
| 2024 | A Three-Stage Dynamic Comparator for SAR ADC Optimized for Reduced Kickback Noise and Ultra-Low Delay | Gupta, Anu; Shekhar, Chandra |
| 2024-10 | Design and Analysis of Modified Strong Arm Latch Comparator with Reduced Kickback Noise | Gupta, Anu; Shekhar, Chandra; Chaturvedi, Nitin |
| 2022-05 | Experimental Investigations on Particle Swarm Optimization Based Control Algorithm for Shunt Active Power Filter to Enhance Electric Power Quality | Bansal, Hari Om; Gautam, Aditya R. |
| 2022-06 | Transformer-based time series prediction of the maximum power point for solar photovoltaic cells | Bansal, Hari Om; Gautam, Aditya R. |
| 2023 | Decoupled Control of Single-Input Double-Output Boost-Flyback Converter | Gautam, Aditya R. |
| 2023-04 | Comparative Analysis of ST, ECRL and Static Logic Style at Different Process Technologies | Asati, Abhijit |
| 2023-06 | Lightweight convolutional neural network architecture implementation using TensorFlow lite | Asati, Abhijit |
| 2023 | Verification of Hardware Resource Utilization through High Level Synthesis for FPGA Implementation | Asati, Abhijit; Shenoy, Meetha V. |
| 2023 | Hardware Software Co-design of k-means Clustering Algorithm | Asati, Abhijit |
| 2023 | Design and Analysis of a Scan Chain in Subthreshold Region | Asati, Abhijit |
| 2024-04 | Convolutional Neural Network Hardware Optimization Using Bayesian Method | Asati, Abhijit; Shenoy, Meetha V. |
| 2024 | Improved Implementation of PYNQ-Based FFT Hardware Accelerator | Asati, Abhijit |
| 2023-10 | Self-Functional Off-Stoichiometry Polymeric Materials: Potential for Tunable Plasmonic Application | Rao, V. Ramgopal |
Collection's Items (Sorted by Submit Date in Descending order): 61 to 80 of 1682
