Collection's Items (Sorted by Submit Date in Descending order): 61 to 80 of 1603
| Issue Date | Title | Author(s) |
| 2002-04 | Simulation Study of Non-Quasi Static Behaviour of MOS Transistors | Rao, V. Ramgopal |
| 2003-04 | Nitrogen dilution effects on structural and electrical properties of hot-wire-deposited a-SiN:H films for deep-sub-micron CMOS technologies | Rao, V. Ramgopal |
| 2002-09 | Optimization of Single Halo p-MOSFET Implant Parameters for Improved Analog Performance and Reliability | Rao, V. Ramgopal |
| 2002-07 | Physical mechanisms for pulsed AC stress degradation in thin gate oxide MOSFETs | Rao, V. Ramgopal |
| 2002 | Suppression of boron penetration by hot wire CVD polysilicon | Rao, V. Ramgopal |
| 2011-02 | Polarity Dependence of Degradation in Ultra Thin Oxide and JVD Nitride Gate Dielectrics | Rao, V. Ramgopal |
| 2011-02 | Device Scaling Effects on Substrate Enhanced Degradation in MOS Transistors | Rao, V. Ramgopal |
| 2011-02 | Degradation Study of Ultra-Thin JVD Silicon Nitride MNSFET | Rao, V. Ramgopal |
| 2011 | Effective dielectric thickness Scaling for High-K Gate Dielectric MOSFETs | Rao, V. Ramgopal |
| 2011-02 | Effect of Technology Scaling on MOS Transistor Performance with High-K Gate Dielectrics | Rao, V. Ramgopal |
| 2001 | Suppression of Parasitic BJT Action in Single Pocket Thin Film Deep Sub-Micron SOI MOSFETs | Rao, V. Ramgopal |
| 2003 | Thin film single halo (SH) SOI nMOSFETs - hot carrier reliability for mixed mode applications | Rao, V. Ramgopal |
| 2003-09 | The Impact of Channel Engineering on the Performance Reliability and Scaling of CHISEL NOR Flash EEPROMs | Rao, V. Ramgopal |
| 2003 | Effect of programming biases on the reliability of CHE and CHISEL flash EEPROMs | Rao, V. Ramgopal |
| 2003-01 | Small signal characteristics of thin film single halo SOI MOSFET for mixed mode applications | Rao, V. Ramgopal |
| 2003-01 | Application of look-up table approach to high-K gate dielectric MOS transistor circuits | Rao, V. Ramgopal |
| 2003-01 | Detailed analysis of FIBL in MOS transistors with high-k gate dielectrics | Rao, V. Ramgopal |
| 2003-02 | A novel dynamic threshold operation using electrically induced junction MOSFET in the deep sub-micrometer CMOS regime | Rao, V. Ramgopal |
| 2004 | The influence of process variations on the Halo MOSFETs and its implications on the analog circuit performance | Rao, V. Ramgopal |
| 2004-07 | Understanding the NBTI Degradation in Halo- Doped Channel p-MOSFETs | Rao, V. Ramgopal |
Collection's Items (Sorted by Submit Date in Descending order): 61 to 80 of 1603
