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Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/4283
Title: Compiler assisted parallelization and optimization for multicore architecture
Authors: Kiran, D C
Keywords: Electrical & Electronics Engineering
Architecture
Issue Date: 8-Jan-2014
Publisher: BITS, Pilani
Description: Supervisor: Prof. S. GURUNARAYANAN
URI: http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/4283
Appears in Collections:Department of Electrical and Electronics Engineering

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