Please use this identifier to cite or link to this item:
http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/4509| Title: | High Performance VLSI Architecture for Digital FIR Filter Design |
| Authors: | Reddy, Srinivasa K. |
| Keywords: | Electronics Engineering Digital FIR Filter Design |
| Issue Date: | 2015 |
| Publisher: | BITS, Pilani |
| Description: | Supervisor: Subhendu Kumar Sahoo |
| URI: | http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/4509 |
| Appears in Collections: | Department of Electrical and Electronics Engineering |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 2007phxf430_thesis.pdf | Thesis | 2.95 MB | Adobe PDF | View/Open |
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