Please use this identifier to cite or link to this item:
http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/4867| Title: | Techniques to Improve the Performance of Cache Memory for Multi-Core Processors |
| Authors: | Chaturvedi, Nitin |
| Keywords: | Electronics CMP Design Trends Multi-Core Processors : Adaptive Block Migration-Replication |
| Issue Date: | 2015 |
| Publisher: | BITS Pilani |
| Description: | Supervisor: S. Gurunarayanan |
| URI: | http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/4867 |
| Appears in Collections: | Department of Electrical and Electronics Engineering |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| nitin-thesis.pdf | Thesis | 4.87 MB | Adobe PDF | View/Open |
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