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  2. BITS Theses
  3. Department of Electrical and Electronics Engineering
Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/4896
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dc.contributor.authorSahoo, Subhendu Kumar-
dc.date.accessioned2022-05-21T03:47:05Z-
dc.date.available2022-05-21T03:47:05Z-
dc.date.issued2006-
dc.identifier.urihttp://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/4896-
dc.descriptionSupervisor(s): Shekhar, Chandraen_US
dc.language.isoenen_US
dc.publisherBITS Pilanien_US
dc.subjectElectrical & Electronics Engineeringen_US
dc.subjectParallel Multipliersen_US
dc.subjectArchitectural Explorationen_US
dc.subjectExploration and Designingen_US
dc.titleParallel Multipliers: Architectural Exploration and Designingen_US
dc.typeThesisen_US
Appears in Collections:Department of Electrical and Electronics Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdf377.68 kBAdobe PDFView/Open
02_certificate.pdf27.5 kBAdobe PDFView/Open
03_Acknowledgement.pdf30.34 kBAdobe PDFView/Open
04_Abstract.pdf19.1 kBAdobe PDFView/Open
05_Content.pdf23.06 kBAdobe PDFView/Open
06_List of Figures, Tables and nomencleture.pdf74.6 kBAdobe PDFView/Open
07_Chapter 1.pdf200.9 kBAdobe PDFView/Open
08_Chapter 2.pdf601.99 kBAdobe PDFView/Open
09_Chapter 3.pdf757.78 kBAdobe PDFView/Open
10_Chapter 4.pdf432.22 kBAdobe PDFView/Open
11_Chapter 5.pdf505.48 kBAdobe PDFView/Open
12_Chapter 6.pdf297.43 kBAdobe PDFView/Open
13_Chapter 7.pdf46.26 kBAdobe PDFView/Open
14_References.pdf59.09 kBAdobe PDFView/Open
15_Appendices.pdf554.43 kBAdobe PDFView/Open
80_Recommendation.pdf422.88 kBAdobe PDFView/Open
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