Please use this identifier to cite or link to this item:
http://dspace.bits-pilani.ac.in:8080/jspui/handle/123456789/5087
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Nayakappa, Patil Geeta | - |
dc.date.accessioned | 2022-08-05T11:15:54Z | - |
dc.date.available | 2022-08-05T11:15:54Z | - |
dc.date.issued | 2018 | - |
dc.identifier.uri | http://localhost:8080/xmlui/handle/123456789/5087 | - |
dc.description | Supervisor: Biju K Raveendran | en_US |
dc.language.iso | en | en_US |
dc.publisher | BITS, Pilani | en_US |
dc.subject | Computer Science & Information Systems | en_US |
dc.title | Design of energy efficient and deterministic memory subsystem for uniprocessor and multicore systems | en_US |
dc.type | Thesis | en_US |
Appears in Collections: | Department of Computer Science and Information Systems |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
PATIL GEETA NAYAKAPPA.pdf | Thesis | 3.02 MB | Adobe PDF | View/Open |
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