Please use this identifier to cite or link to this item:
http://dspace.bits-pilani.ac.in:8080/jspui/handle/123456789/8975
Title: | High‐k Gate Dielectric Selection for Germanium based CMOS Devices |
Authors: | Gupta, Navneet |
Keywords: | EEE Material selection Germanium TOPSIS High‐k Gate Dielectrics CMOS Devices |
Issue Date: | Apr-2018 |
Publisher: | International Journal of Nanoelectronics and Materials |
Abstract: | This paper presents a systematic approach of material selection for gate oxide material in Germanium (Ge) based CMOS Devices. Various possible high‐k gate dielectrics that can be stacked with Ge substrates are Al2O3, HfO2, La2O3, Y2O3, ZrO2 and Lu2O3. However, each of the dielectric material has its own advantages and limitations therefore it is important to select the best possible candidate. For this purpose, Technique for Order Preference by Similarity to Ideal Solution (TOPSIS) as a Multiple Attribute Decision Making (MADM) technique is used. Based on the ranking derived from TOPSIS, it is found that La2O3 is the most suitable material, followed by Y2O3 for being used as a gate dielectric in Ge‐based CMOS devices. The proposed result is in good agreement with experimental findings thus justifying the validity of the proposed study. |
URI: | https://ijneam.unimap.edu.my/images/PDF/IJNEAM%20No.%202%202018%20April/Vol_11_No_2_2018_1_119-126.pdf http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/8975 |
Appears in Collections: | Department of Electrical and Electronics Engineering |
Files in This Item:
There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.