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Title: | Effects of grain boundary width on transfer characteristics of polysilicon thin-film transistor |
Authors: | Gupta, Navneet |
Keywords: | EEE Polysilicon thin-film transistor Grain boundary Effective carrier mobility |
Issue Date: | 2006 |
Publisher: | World Scientific |
Abstract: | The grain boundary scattering effects on carrier transport were studied analytically by considering the grains and grain boundaries that act as the series resistance in the channel of a polycrystalline silicon (poly-Si) thin-film transistor (TFT). Effective carrier mobility (μ*) and drain current (ID) variations were analyzed using the model by changing the grain boundary width (DGB) in the channel as a function of the gate voltage, in the linear region of the poly-Si TFT characteristic at room temperature. μ* and ID were computed for DGB ranging from 1 nm to 10 nm. It was found that for different values of the gate voltage, μ* and ID increased with a decrease in grain boundary width (DGB). A remarkable improvement was observed in device characteristics as DGB was decreased below 2 nm. The predicted results using the present model are in a reasonably good agreement with experimental results, hence confirming the validity of the model. |
URI: | https://www.worldscientific.com/doi/10.1142/S0217984906010986 http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9013 |
Appears in Collections: | Department of Electrical and Electronics Engineering |
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