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DC Field | Value | Language |
---|---|---|
dc.contributor.author | Gupta, Anu | |
dc.contributor.author | Shekhar, Chandra | |
dc.contributor.author | Asati, Abhijit | |
dc.date.accessioned | 2023-02-09T11:11:02Z | |
dc.date.available | 2023-02-09T11:11:02Z | |
dc.date.issued | 2009-08 | |
dc.identifier.uri | https://link.springer.com/article/10.1007/s11265-009-0392-x | |
dc.identifier.uri | http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9127 | |
dc.description.abstract | Redundant binary number appears to be appropriate for high-speed arithmetic operation, but the delay and hardware cost associated with the conversion from redundant binary (RB) to natural binary (NB) number is still a challenging task. In the present investigation a simple approach has been adopted to achieve high speed with lesser hardware and power saving. A circuit level approach has been adopted to implement the equivalent bit conversion algorithm (EBCA) (Kim et al. IEEE Journal of Solid State Circuits 36:1538-1544, 2001, 38:159-160, 2003) for RB to NB conversion. The circuit is designed based on exploration of predictable carry out feature of EBCA algorithm. This implementation concludes a significant delay power product and component complexity advantage for a 64-bit RB to NB conversion using novel carry-look-ahead equivalent bit converter. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Springer | en_US |
dc.subject | EEE | en_US |
dc.subject | Natural Binary | en_US |
dc.subject | Number Converter | en_US |
dc.title | A Novel Redundant Binary Number to Natural Binary Number Converter | en_US |
dc.type | Article | en_US |
Appears in Collections: | Department of Electrical and Electronics Engineering |
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