DSpace logo

Please use this identifier to cite or link to this item: http://dspace.bits-pilani.ac.in:8080/jspui/xmlui/handle/123456789/9130
Title: Design of 10-bit Digital to Analog Converter Using Cascaded Operational Amplifier Topology
Authors: Gupta, Anu
Keywords: EEE
Cascaded Op-Amp Topology
DAC
Digital to Analog Converter
Issue Date: 2009
Publisher: ACEEE
Abstract: This paper proposes an approach for designing a R-2R 10 bit Digital to Analog Converter (DAC) which could be made to operate at low voltage supply by efficiently exploiting the cascaded Operational Amplifier (Op-Amp) architecture. The DAC operates at a 3V power supply with a settling time of 50-100ns , dynamic range of around 50-60 dB for signals upto a frequency of 10Mhz. Graph & simulation results are provided to verify the stability of the Op-Amp used in DAC
URI: https://citeseerx.ist.psu.edu/document?repid=rep1&type=pdf&doi=e4053b042b25ed657dd7fb62aa7d8aae7b313cdc
http://dspace.bits-pilani.ac.in:8080/xmlui/handle/123456789/9130
Appears in Collections:Department of Electrical and Electronics Engineering

Files in This Item:
There are no files associated with this item.


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.